Vol. 21 No. 3 (2022): Mapana Journal of Sciences
Research Articles

Lossy & Lossless Capacitance Multipliers: A Series of Realization Using VDTAs & Single Grounded Capacitor

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  • Tapas Kumar Paul,
  • Suvajit Roy,
  • Radha Raman Pal
Tapas Kumar Paul
Vidyasagar University, West Bengal.
Bio
Suvajit Roy
Vidyasagar University, West Bengal.
Bio
Radha Raman Pal
Vidyasagar University, West Bengal.
Bio

Published 2022-12-06

Keywords

  • Capacitance multiplier,
  • Parasitic capacitance cancellation,
  • Electronic control,
  • Multiplication factor,
  • Voltage differencing transconductance amplifier

Copyright (c) 2022

Creative Commons License

This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Abstract

The article presents new realizations of capacitance multiplier circuits, employing two voltage differencing transconductance amplifiers (VDTAs) and one capacitor without any passive resistors. The equivalent capacitance value of the proposed capacitance simulators can be achieved electronically by regulating the DC bias currents of VDTAs. All the proposed realizations do not require any critical component matching conditions. The lossless floating negative capacitor multiplier (NCM) circuit is studied in detail. The capacitive cancellation scheme and a quadrature sinusoidal oscillator circuit are included to demonstrate the effectiveness of the circuit. The effect of the VDTA non-idealities and parasitic on the realized circuits is analysed. SPICE simulation results using TSMC 0.18 μm CMOS technology parameters are presented to reflect the workability of the proposed NCM.

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